The most useful conclusion is not a single yes or no. Different layers of the project have different evidential status. The algebra is exact, the full ideal circuit is validated, the full hardware route is not ready, and a much narrower logical observable has passed an initial real-device diagnostic.
Current bottom line: this is a rigorous digital-simulation and hardware-validation project. It is not a demonstration of physical anyons, topological protection, scalable computation, or quantum advantage.
Claim-by-claim evidence
| Possible claim | Evidence | Verdict |
|---|---|---|
| The locked Fibonacci F/R data are coherent | All enumerated unitarity, pentagon, hexagon, and braid-relation checks pass | Established |
| The braid representation is non-Abelian | \([B_1,B_2]\) is nonzero and a fixed measurement changes by \(1/\phi\) | Established |
| The 3q, 5q, and corrected 9q ideal circuits match their targets | Full complex-state fidelities exceed \(1-5\times10^{-14}\) | Established |
| The full source-drawn 9q circuit is ready for current hardware | Heavy-hex compilation and frozen noise gates fail | Not established |
| One fixed-input logical observable works on IBM hardware | Interleaved 256-shot diagnostic includes \(1/\phi^2\) in its corrected interval | Established at diagnostic scale |
| Every source F-move ran in the hardware diagnostic | Observable compression removed that requirement | False |
| The qubits were physical Fibonacci anyons | The device used ordinary superconducting qubits | False |
| The encoding was topologically protected | No passive topological protection is supplied by digital encoding | False |
| Quantum advantage was demonstrated | No classically hard scaled task or runtime separation was tested | False |
The immediate next experiment
The diagnostic authorizes a higher-shot repeat of the same interleaved, observable-compressed protocol. That run should preserve the frozen circuit hashes, native layout, control order, assignment correction, leakage definition, and drift tests. Its purpose would be to narrow the confidence interval and test repeatability across a longer execution, not to enlarge the claim.
The completed 256-shot job should remain visible even if the next run disagrees. A reproducible project records both confirming and disconfirming data rather than replacing an inconvenient snapshot.
Reopening the full nine-qubit question
The best source-equivalent order circuit still uses 161 CX gates at depth 285 in the all-to-all comparison, and substantially more after sparse-topology routing. To put the full source process on hardware, a new design must pass the same exact-state oracle and the unchanged raw interpretability gates. Possible research directions include a stronger relative-phase synthesis, native controlled-phase compilation, alternative lattice layouts, mid-circuit measurement with feedforward, or a different phase-sensitive observable that retains more of the source process.
Any such proposal must state whether it is:
- equal to the source operation on the complete reachable support;
- equal only on one fixed input;
- or merely expected to reproduce one scalar observable.
Those are not interchangeable notions of validation.
A future scaling program is a hypothesis, not a result
One longer-term route would move from 25–30 qubit hardware validation, through a 49–64 qubit classical-crossover study, toward a 70–100 qubit Fibonacci string-net or chromatic-polynomial sampling candidate. Those ranges are planning hypotheses. They do not establish where a classical crossover actually lies, and qubit count alone cannot define advantage.
A credible future advantage claim would need all of the following:
- a precisely defined computational task and output distribution;
- the strongest available classical algorithms and hardware as baselines;
- an end-to-end resource comparison, including compilation, sampling, verification, and mitigation;
- a scaling trend across multiple system sizes rather than one isolated device point;
- a validation method that remains meaningful when exact statevector simulation is no longer possible;
- evidence that the quantum device reaches a quality or time regime unavailable to the classical baseline.
This project has not performed that program. The Nature Communications string-net work provides an important research direction by connecting Fibonacci condensate sampling to chromatic polynomials, but citing a classically hard target is not the same as demonstrating an end-to-end advantage on the circuits studied here.
What has genuinely been learned
Three lessons already survive the claim boundary. First, exact category algebra can be translated into a concrete measurement oracle with a golden-ratio contrast. Second, a small logical circuit can hide an enormous native-gate cost when generic multi-control synthesis ignores physical structure. Third, aggressive observable compression can turn an impossible hardware circuit into an interpretable diagnostic — provided the narrower meaning is stated plainly.
That is a solid result. It gives the next experiment a clear purpose and prevents a successful small-device measurement from being mistaken for a scalability result it does not contain.